OuessantQuickStart » History » Version 7
Pierre-Henri HORREIN, 03/15/2016 01:47 PM
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2 | 4 | Pierre-Henri HORREIN | {{>toc}} |
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4 | 1 | Pierre-Henri HORREIN | h1. Ouessant HowTos: Quickstart |
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6 | 5 | Pierre-Henri HORREIN | This page is still a Work in Progress. Feel free to signal any mistake/lack in the description. |
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8 | 5 | Pierre-Henri HORREIN | h2. First simulation |
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10 | 1 | Pierre-Henri HORREIN | Here are the required steps to set a Ouessant based system up. For now, only Leon based platforms are possible |
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12 | 1 | Pierre-Henri HORREIN | h3. Requirements |
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14 | 1 | Pierre-Henri HORREIN | In order to use Ouessant, a few tools are needed. |
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16 | 1 | Pierre-Henri HORREIN | The Ouessant code base and build architecture relies on GNU/Linux common building tools. We do not support Windows as a development platform. On a Debian/Ubuntu GNU/Linux distribution, you can get the required tools with the following command: |
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18 | 1 | Pierre-Henri HORREIN | @sudo apt-get install build-essential gcc make git @ |
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20 | 1 | Pierre-Henri HORREIN | Ouessant is a hardware design, thus CAD tools are needed according to your needs: |
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22 | 5 | Pierre-Henri HORREIN | * if you want to work in simulation, ModelSim is required. |
23 | 2 | Pierre-Henri HORREIN | * if you want to work with Xilinx FPGA, ISE toolsuite with a valid license for the board you are using is required. Please note that for Nexys4 and Atlys board, ISE WebPack is sufficient. You will also need tools to program the board (impact for Xilinx, Adept for Digilent boards). |
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25 | 1 | Pierre-Henri HORREIN | Furthermore, you will need the tools for the processor you are working with. For LEON based SoC, this means : |
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27 | 1 | Pierre-Henri HORREIN | * the compiler(s) for the SPARC processor (Linux or/and bare (http://www.gaisler.com/index.php/downloads/compilers?task=view&id=161) according to your needs) |
28 | 2 | Pierre-Henri HORREIN | * the GRMON debugger (http://www.gaisler.com/index.php/downloads/debug-tools?task=view&id=190) |
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30 | 1 | Pierre-Henri HORREIN | We assume that all those tools are available, and correctly configured. Please refer to the corresponding manuals if you need more information. Boards specific instruction for supported devices are provided in [OuessantBoards|the Ouessant boards page]. |
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32 | 5 | Pierre-Henri HORREIN | h3. Getting started: setting up Ouessant environment |
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34 | 7 | Pierre-Henri HORREIN | # Download the project repository: |
35 | 7 | Pierre-Henri HORREIN | <pre>git clone https://redmine.telecom-bretagne.eu/git/ouessant/ </pre> |
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37 | 7 | Pierre-Henri HORREIN | # Go to the project's root (ie. the folder you have just created by cloning the repository). If you put it in your home directory, you can do this by typing : |
38 | 1 | Pierre-Henri HORREIN | <pre>cd ~/ouessant</pre> |
39 | 1 | Pierre-Henri HORREIN | # Set up the Ouessant environment: |
40 | 1 | Pierre-Henri HORREIN | <pre>make env</pre> |
41 | 1 | Pierre-Henri HORREIN | This will clone all necessary files from the git. |
42 | 1 | Pierre-Henri HORREIN | *Warning* : make sure that you have all the required permissions on the ouessant folder. |
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44 | 5 | Pierre-Henri HORREIN | We provide as much automation as possible to speed up the process of getting a Ouessant processor up and running. You can get all available commands and help by typing @make help@ in the command line. |
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46 | 5 | Pierre-Henri HORREIN | The code is divided in 5 main directories (other directories will be described later): |
47 | 5 | Pierre-Henri HORREIN | * @ocp@ contains the main VHDL code for Ouessant, |
48 | 5 | Pierre-Henri HORREIN | * @drivers@ has all the example codes in it, for Linux and baremetal |
49 | 5 | Pierre-Henri HORREIN | * @socs@ is the main directory for complete example System on Chips |
50 | 5 | Pierre-Henri HORREIN | * @scripts@ contains tools for automation |
51 | 5 | Pierre-Henri HORREIN | * @tools@ is created to store tools for Ouessant, mainly the assembler |
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53 | 5 | Pierre-Henri HORREIN | When you run the @make env@ command, you download all required tools (especially the Leon tools), generate the Ouessant configurations, and compile the tools. You are now ready to compile a complete SoC with associated software, and run your first test. |
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55 | 5 | Pierre-Henri HORREIN | h3. Simulate a first Leon design |
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57 | 1 | Pierre-Henri HORREIN | # Now go to the leon3-ouessant-mst-minimal folder by typing: |
58 | 3 | Pierre-Henri HORREIN | <pre>cd socs/leon3-ouessant-mst-minimal/</pre> |
59 | 2 | Pierre-Henri HORREIN | and compile the project by running |
60 | 3 | Pierre-Henri HORREIN | <pre>make vsim</pre> |
61 | 1 | Pierre-Henri HORREIN | By default, this will compile a Leon processor with required peripherals, and a Ouessant with a Spiral DFT (256 points) accelerator. |
62 | 2 | Pierre-Henri HORREIN | # Finally, type |
63 | 3 | Pierre-Henri HORREIN | <pre>make vsim-launch</pre> |
64 | 2 | Pierre-Henri HORREIN | to launch the simulation. This will only launch ModelSim?, you can then launch the simulation. This example takes a simulated 30 ms to complete. |
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66 | 6 | Pierre-Henri HORREIN | h2. Going further |
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68 | 1 | Pierre-Henri HORREIN | h3. Going further: modifying the project |
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70 | 1 | Pierre-Henri HORREIN | Congratulations, you launched your first Ouessant project! |
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72 | 1 | Pierre-Henri HORREIN | You can now modify it if you want to suit your need. |
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74 | 1 | Pierre-Henri HORREIN | If you open the @leon3mp.vhd@ file, you will see the top for this design. You can modify the Ouessant instantiation in it (called @ouessant0@). For example, you can change the @orac@ generic parameter to suit your need. |
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76 | 1 | Pierre-Henri HORREIN | You can also modify the test source code by editing the @systest.c@ file. For the moment, no Ouessant compiler exists, and the microcode must be written directly in binary. |
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78 | 1 | Pierre-Henri HORREIN | h3. Getting started: run Ouessant on a FPGA |
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80 | 1 | Pierre-Henri HORREIN | For now, Ouessant is available on Atlys and Nexys4 boards, only with a Leon project. |
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82 | 2 | Pierre-Henri HORREIN | # If you want to load your project on FPGA, you first have to connect it to your computer and to turn it on. |
83 | 2 | Pierre-Henri HORREIN | # Go into the SoC design corresponding to your FPGA~/ouessant/design/leon3-ouessant-digilent-atlys/ and make sure there is the right version of leon3mp.vhd and systest.c. |
84 | 2 | Pierre-Henri HORREIN | # Type the following command line "make ise-prog-fpga". This will compile all vhd files for your Digilent Atlys FPGA. Please note that you should have Adept already installed. |
85 | 2 | Pierre-Henri HORREIN | # Type the following command line "sparc-elf-gcc systest.c -o systest". This will cross compile your C file into a binary stream for your FPGA. |
86 | 2 | Pierre-Henri HORREIN | # Connect your FPGA to your computer using its IP address via Network Manager for instance. |
87 | 2 | Pierre-Henri HORREIN | # Type the following command line "grmon -eth XXX.XXX.X.XX" where XXX.XXX.X.XX is your FPGA's IP address. The LED at the right of your FPGA should be on. |
88 | 2 | Pierre-Henri HORREIN | # Open PuTTY by typing "putty" in your terminal. Please note that you should have PuTTY already installed. |
89 | 2 | Pierre-Henri HORREIN | # Fill the Host Name field with "/dev/ttyACM0" and the port name with "38 400". |
90 | 2 | Pierre-Henri HORREIN | # To make sure that you're correctly connected, click on the reset button on your FPGA. A short message should pop on the PuTTY terminal. |
91 | 2 | Pierre-Henri HORREIN | # Now you can load your program by typing the following command line in the GRMON terminal load systest.exe. |
92 | 2 | Pierre-Henri HORREIN | # Finally, you can run your program simply by typing "run" in the GRMON terminal. |
93 | 2 | Pierre-Henri HORREIN | # When you're done, you can exit the GRMON terminal by typing "quit". |
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95 | 2 | Pierre-Henri HORREIN | Have fun ! |