Erwan LIBESSART

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  • Registered on: 04/08/2015
  • Last connection: 06/28/2019

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Activity

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10/23/2017

02:43 PM Scaling-less Newton-Raphson Revision 2 (scaling-less-newton-raphson): Reciprocal square root commit

05/10/2017

03:46 PM Scaling-less Newton-Raphson Revision 1 (scaling-less-newton-raphson): Initial commit

03/12/2015

10:40 AM Ouessant Revision cd4e315e (ouessant): Replacement of the controller_top.vhd file

03/11/2015

10:48 AM Ouessant Revision ae1479a2 (ouessant): Integration of IDCT
Adding the integration of the IDCT in the coprocessor, validated by simulation

03/06/2015

01:41 PM Ouessant Revision d4b339fd (ouessant): Interfaces integration
Simulation of the architecture with the interfece's both ports (slave apb and master ahb.

03/04/2015

01:49 PM Ouessant Revision 7d6d30f4 (ouessant): AHB master interface commit
Adding the AHB master interface block and its testbench.

02/24/2015

04:06 PM Ouessant Revision 976510b2 (ouessant): Tested on board commit
Commit after the on-board test of the controller with the integrated memory.
The ucf file is in the circ/ repository ...

02/20/2015

03:52 PM Ouessant Revision 3325fe19 (ouessant): Controller with RAM commit
Commit of the test of the Controller block with data stored in a RAM component
10:42 AM Ouessant Revision 65cb7ec0 (ouessant): Update of the COMMON.pkg
10:28 AM Ouessant Revision 5e81c41d (ouessant): Simulated Controller
Commit of the controller validated by simulation.
Testbench is added in testbench directory.

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